The 2017 International Workshop on “Dielectric Thin Films for Future Electron Devices: Science and Technology” (2017 IWDTF) will be held at the Todaiji Culture Center, Nara, Japan, on November 20-22, 2017. In addition to the papers on conventional logic devices, the papers on various electron devices including the memory, the power, the analog, the sensor, and the display devices are welcomed. The workshop will consist of invited and contributed talks, and poster presentations. Selected topics of current interests will be reviewed by several invited talks.
Papers are solicited in, but not limited to, the following area:

  • Gate dielectrics (high-k dielectrics, ultrathin silicon dioxide, oxynitride and oxide-nitride composite dielectrics) and metal electrodes
  • Mobility enhancement technology
  • 2D/3D materials and devices (including nanowires, CNT/graphene/2D materials, and 3D devices)
  • Growth and related process of dielectric films
  • Electrical characterization of dielectrics
  • Gate dielectric wearout and reliability (including RTN)
  • Characterization and control of gate dielectric/semiconductor interfaces (Si, Ge, SiGe, GeSn, III-V, etc.), including junction technology
  • Surface preparation and cleaning issues for dielectrics
  • Dielectric reliability related to process integration
  • Theoretical approaches to dielectrics/semiconductor structure
  • Surface passivation technology (including application to photovoltaics and organic thin film devices)
  • Memory applications (MRAM, FeRAM, PCRAM, ReRAM, Flash memory, neuromorphic applications, etc.)
  • Low voltage operation devices (tunnel FET, negative capacitance FET, etc.)
  • Sensor, analog, display, and other applications
  • Power device (Si, SiC, GaN, Ga2O3, Diamond, etc.)